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Conference Papers Year : 2022

Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs

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Abstract

Hardware Trojan (HT) insertion is a major security threat for electronic components that demand a high trust level. Several HT attack mechanisms have been demonstrated to date, and several HT prevention and detection countermeasures have been proposed to thwart HT attacks. Given the multitude of HT attack mechanisms, run-time monitors for HT detection are used as a last line of defense. In this paper, we propose a run-time monitoring methodology for HT attack mechanisms affecting the analog and mixed-signal (AMS) sections of an Integrated Circuit (IC). The methodology is based on the Symmetry-based Built-In Self-Test (SymBIST) principle that relies on distributing invariances across the IC and continuously checking for their compliance. Detection of various HT attacks are demonstrated on a Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) IP at transistor-level.
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Dates and versions

hal-03587673 , version 1 (24-02-2022)

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Antonios Pavlidis, Eric Faehn, Marie-Minerve Louërat, Haralampos-G. Stratigopoulos. Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs. 40th IEEE VLSI Test Symposium 2022, Apr 2022, San Diego, United States. pp.1-8, ⟨10.1109/VTS52500.2021.9794208⟩. ⟨hal-03587673⟩
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