An Implementation of DES and AES, Secure against Some Attacks, Cryptogaphic Hardware and Embedded Systems ? CHES 2001, pp.309-318, 2001. ,
DOI : 10.1007/3-540-44709-1_26
Cache timing attacks on AES, 2004. ,
AES power attack based on induced cache miss and countermeasure, International Conference on Information Technology: Coding and Computing (ITCC'05), Volume II, pp.586-591, 2005. ,
DOI : 10.1109/ITCC.2005.62
Differential Power Analysis in the Presence of Hardware Countermeasures, Cryptographic Hardware and Embedded Systems ? CHES 2000, pp.252-263, 1965. ,
DOI : 10.1007/3-540-44499-8_20
Computer Architecture: A Quantitative Approach, 2003. ,
Differential Power Analysis, Advances in Cryptology ? CRYPTO '99, pp.388-397, 1999. ,
DOI : 10.1007/3-540-48405-1_25
http://www.mips.com/content/Products ,
Experimenting with Faults, Lattices and the DSA, Public Key Cryptography ? PKC 2005, pp.16-28, 2005. ,
DOI : 10.1007/978-3-540-30580-4_3
Cache Attacks and Countermeasures: The Case of AES, 2005. ,
DOI : 10.1007/11605805_1
Theoretical use of cache memory as a cryptanalytic side?channel. Cryptology ePrint Archive, Report, vol.169, 2002. ,
Defending against cache-based side-channel attacks, Information Security Technical Report, vol.8, issue.1, pp.30-44, 2003. ,
DOI : 10.1016/S1363-4127(03)00104-3
Partitioning attacks: or how to rapidly clone some GSM cards, Proceedings 2002 IEEE Symposium on Security and Privacy, pp.31-41, 2002. ,
DOI : 10.1109/SECPRI.2002.1004360
Cryptanalysis of DES Implemented on Computers with Cache, Cryptographic Hardware and Embedded Systems ? CHES 2003, pp.62-76, 2003. ,
DOI : 10.1007/978-3-540-45238-6_6