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Wire-bonding on inkjet-printed silver pads reinforced by electroless plating for chip on flexible board packages

Abstract : The nanoporous nature of the inkjet printed silver nanoparticles entail low hardness and surface effective contact area for being compatible with pads that are suitable for wire-bonding in electronic packaging. Electroless nickel plating is a selective metal deposition technique which can brings the required thickness and hardness for further pads processing. Here, a 1.7 μm thick nickel layer is deposited on top of 600 nm thick printed and sintered silver nanoparticles using Kapton polyimide as substrate. Prior to plating, a special attention was put on tuning microstructures of printed silver pads by sintering nanoparticles at various temperature ramps (0.1, 10 and 50°C/s) up to 200°C. Results show that fast sintering exhibits the lowest electrical resistivity which is suitable in printed interconnects. However, wire-bonding on nickel pads is best achieved when low sintering ramp is used. This slow sintering presents the highest adhesion strength at the nickel/silver interface since the pores dimensions were restricted to the nanoscale. The validation of the optimized bonding process came from the low electrical contact resistance between plated nickel and the bonded gold wire, and from the wire-pull test which is in accordance with the MIL-STD 883 standard. The actual results show that a compromise has to be found when emphasis is on patterning low resistive interconnects or stiff pads for wire-bonding applications. This compromise is tailored by the sintering engineering.
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https://hal-emse.ccsd.cnrs.fr/emse-00530148
Contributor : Romain Cauchois <>
Submitted on : Thursday, August 1, 2013 - 1:20:35 PM
Last modification on : Wednesday, June 24, 2020 - 4:18:19 PM
Long-term archiving on: : Saturday, November 2, 2013 - 2:30:11 AM

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Romain Cauchois, Mohamed Saadaoui, Jacques Legeleux, Thierry Malia, Béatrice Dubois-Bonvalot, et al.. Wire-bonding on inkjet-printed silver pads reinforced by electroless plating for chip on flexible board packages. ESTC 2010. Electronics System Integration Technology Conference, Sep 2010, Berlin, Germany. pp.AP-4, ⟨10.1109/ESTC.2010.5642997⟩. ⟨emse-00530148⟩

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