Feedforward Run-to-Run Control for Reduced Parametric Transistor Variation in CMOS Logic 0.13μm Technology

Abstract : Targeting the physical gate critical dimension (CD) greatly impacts device performance. Unfortunately, advanced products within the CMOS logic 0.13μm technology suffer from a large gate CD lot-to-lot variation, thereby causing an important device parametric characteristics variability. A novel technique is to develop a feedforward controller, which corrects for gate CD deviation by tuning the pocket implant dose. In order to enhance the controller robustness, a new scatterometry grating has been considered. The FFE-PI2 control system is simulated and then implemented in a 8" semiconductor device manufacture. Results indicate a 40% decrease in lot-to-lot variation of transistor performance.
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IEEE Transactions on Semiconductor Manufacturing, Institute of Electrical and Electronics Engineers, 2011, 24 (2), pp.273-279. 〈10.1109/TSM.2011.2120910〉
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https://hal-emse.ccsd.cnrs.fr/emse-00613042
Contributeur : Stéphane Dauzère-Pérès <>
Soumis le : mardi 2 août 2011 - 12:17:40
Dernière modification le : jeudi 30 novembre 2017 - 01:19:10

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Nader Jedidi, Pascal Sallagoity, Agnès Roussy, Stéphane Dauzère-Pérès. Feedforward Run-to-Run Control for Reduced Parametric Transistor Variation in CMOS Logic 0.13μm Technology. IEEE Transactions on Semiconductor Manufacturing, Institute of Electrical and Electronics Engineers, 2011, 24 (2), pp.273-279. 〈10.1109/TSM.2011.2120910〉. 〈emse-00613042〉

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