Feedforward Run-to-Run Control for Reduced Parametric Transistor Variation in CMOS Logic 0.13μm Technology - Mines Saint-Étienne Access content directly
Journal Articles IEEE Transactions on Semiconductor Manufacturing Year : 2011

Feedforward Run-to-Run Control for Reduced Parametric Transistor Variation in CMOS Logic 0.13μm Technology

Abstract

Targeting the physical gate critical dimension (CD) greatly impacts device performance. Unfortunately, advanced products within the CMOS logic 0.13μm technology suffer from a large gate CD lot-to-lot variation, thereby causing an important device parametric characteristics variability. A novel technique is to develop a feedforward controller, which corrects for gate CD deviation by tuning the pocket implant dose. In order to enhance the controller robustness, a new scatterometry grating has been considered. The FFE-PI2 control system is simulated and then implemented in a 8" semiconductor device manufacture. Results indicate a 40% decrease in lot-to-lot variation of transistor performance.
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Dates and versions

emse-00613042 , version 1 (02-08-2011)

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Cite

Nader Jedidi, Pascal Sallagoity, Agnès Roussy, Stéphane Dauzère-Pérès. Feedforward Run-to-Run Control for Reduced Parametric Transistor Variation in CMOS Logic 0.13μm Technology. IEEE Transactions on Semiconductor Manufacturing, 2011, 24 (2), pp.273-279. ⟨10.1109/TSM.2011.2120910⟩. ⟨emse-00613042⟩
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