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Journal Articles IEEE Transactions on Components, Packaging and Manufacturing Technology. Part A, Manufacturing Technology Year : 2014

Thermal Effects of Silicon Thickness in 3-D ICs: Measurements and Simulations

Vincent Fiori
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Alexis Farcy
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Haykel Ben Jamaa
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Jean-Philippe Colonna
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Abstract

This paper presents the impact of silicon thickness on the temperature and the thermal resistance in a 3-D stack integrated circuits. This paper uses electrical measurements thanks to embedded in situ sensors and numerical design of experiments (DOEs). The primary objective is to provide the sensitivity of modeling factors by analyzing the variance on the basis of Sobol indices through DOE. The results show a strong influence of the silicon thickness and of the position of the hot spots with respect to the sensors on the maximum temperature and the thermal resistance of the total stack. The boundary conditions, in particular the heat-transfer coefficient of the bottom surface of the wafer, are also identified as significant factors. Therefore, simulation results and measurement approaches are compared. The measurements are carried out with embedded in situ sensors in the bottom die at wafer level. The results show a significant increase in temperature while decreasing the silicon thickness.
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emse-01498657 , version 1 (24-08-2021)

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Papa Momar Souare, Vincent Fiori, Alexis Farcy, François de Crécy, Haykel Ben Jamaa, et al.. Thermal Effects of Silicon Thickness in 3-D ICs: Measurements and Simulations. IEEE Transactions on Components, Packaging and Manufacturing Technology. Part A, Manufacturing Technology, 2014, 4 (8), pp.1284-1292. ⟨10.1109/TCPMT.2014.2327654⟩. ⟨emse-01498657⟩
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