B. Gill, M. Nicolaidis, F. Wolff, C. Papachristou, and S. Garverick, An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories, Europe Conference and Exhibition (DATE), 2005.
URL : https://hal.archives-ouvertes.fr/hal-00013724

E. H. Neto, Using Bulk Built-in Current Sensors to Detect Soft Errors, 18th Symposium on Integrated Circuits and Systems Design, 2006.
DOI : 10.1109/MM.2006.103

E. H. Neto, F. L. Kastensmidt, and G. I. Wirth, Tbulk-BICS: A built-in current sensor robust to process and temperature variations for SET detection, 2007 9th European Conference on Radiation and Its Effects on Components and Systems, 2007.
DOI : 10.1109/RADECS.2007.5205469

A. Simionovski, G. Wirth, and S. Member, Simulation Evaluation of an Implemented Set of Complementary Bulk Built-In Current Sensors With Dynamic Storage Cell, IEEE Transactions on Device and Materials Reliability, vol.14, issue.1, 2014.
DOI : 10.1109/TDMR.2013.2252176

J. M. Dutertre, R. P. Bastos, O. Potin, M. L. Flottes, B. Rouzeyre et al., Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS, European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), 2014.
DOI : 10.1016/j.microrel.2014.07.151

URL : https://hal.archives-ouvertes.fr/emse-01094805

V. Pouget, H. Lapuyade, D. Lewis, Y. Deval, P. Fouillat et al., SPICE Modeling of the Transient Response of Irradiated MOSFETs, IEEE Transactions on Nuclear Science, 2000.
URL : https://hal.archives-ouvertes.fr/hal-00184305

C. Champeix, N. Borrel, J. Dutertre, B. Robisson, A. Sarafianos et al., SEU sensitivity and modeling using picosecond pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology, IEEE Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium (DFTS), 2015.
URL : https://hal.archives-ouvertes.fr/emse-01227355

R. Baumann, Radiation-induced soft errors in advanced semiconductor technologies, IEEE Transactions on Device and Materials Reliability, vol.5, issue.3, 2005.
DOI : 10.1109/TDMR.2005.853449

W. Sootkaneung and K. K. Saluja, On techniques for handling soft errors in digital circuits, 2010 IEEE International Test Conference, 2010.
DOI : 10.1109/TEST.2010.5699278

P. Sawadpong, E. B. Allen, and J. B. Williams, Exception Handling Defects: An Empirical Study, 2012 IEEE 14th International Symposium on High-Assurance Systems Engineering, 2012.
DOI : 10.1109/HASE.2012.24

H. H. Zhu, Handling Soft Error in Embedded Software for Networking System, 2014 IEEE International Symposium on Software Reliability Engineering Workshops, 2014.
DOI : 10.1109/ISSREW.2014.109