G. Piret and J. Quisquater, A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad, Cryptographic Hardware and Embedded Systems-CHES 2003, pp.77-88, 2003.
DOI : 10.1007/978-3-540-45238-6_7

J. Daemen and V. Rijmen, The design of Rijndael: AES-the advanced encryption standard, 2013.
DOI : 10.1007/978-3-662-04722-4

M. Agoyan, J. Dutertre, D. Naccache, B. Robisson, and A. Tria, When Clocks Fail: On Critical Paths and Clock Faults, Smart Card Research and Advanced Application, pp.182-193, 2010.
DOI : 10.1007/978-3-642-12510-2_13

URL : https://hal.archives-ouvertes.fr/emse-00474337

A. Dehbaoui, J. Dutertre, B. Robisson, P. Orsatelli, P. Maurine et al., Injection of transient faults using electromagnetic pulsespractical results on a cryptographic system, IACR Cryptology ePrint Archive, vol.2012, p.123, 2012.

P. Maurine, K. Tobich, T. Ordas, and P. Y. Liardet, Yet Another Fault Injection Technique : by Forward Body Biasing Injection, YACC'2012: Yet Another Conference on Cryptography, 2012.
URL : https://hal.archives-ouvertes.fr/lirmm-00762035

S. P. Skorobogatov and R. J. Anderson, Optical Fault Induction Attacks, Cryptographic Hardware and Embedded Systems-CHES 2002, pp.2-12, 2003.
DOI : 10.1007/3-540-36400-5_2

S. Buchner, F. Miller, V. Pouget, and D. Mcmorrow, Pulsed-Laser Testing for Single-Event Effects Investigations, IEEE Transactions on Nuclear Science, vol.60, issue.3, pp.1852-1875, 2013.
DOI : 10.1109/TNS.2013.2255312

URL : https://hal.archives-ouvertes.fr/hal-01633917

V. De, A. Keshavarzi, S. Narendra, and S. Borkar, Multiple well transistor circuits having forward body bias Available: https, 2001.

J. Tschanz, J. Kao, S. Narendra, R. Nair, D. Antoniadis et al., Adaptive body bias for reducing impacts of dieto-die and within-die parameter variations on microprocessor frequency and leakage, " Solid-State Circuits, IEEE Journal, vol.37, issue.11, pp.1396-1402, 2002.

T. Fuhr, E. Jaulmes, V. Lomné, and A. Thillard, Fault Attacks on AES with Faulty Ciphertexts Only, 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.108-118, 2013.
DOI : 10.1109/FDTC.2013.18