Hybrid FeRAM/RRAM synapse circuit for on-chip inference and learning at the edge - Département Systèmes et Circuits Intégrés Numériques Access content directly
Conference Papers Year : 2023

Hybrid FeRAM/RRAM synapse circuit for on-chip inference and learning at the edge

Abstract

This paper presents an experimental demonstration of a hybrid FeRAM/RRAM synaptic circuit. The circuit incorporates Metal-Ferroelectric-Metal stacks, which exhibit native FeRAM behavior and function as RRAMs after undergoing a forming operation. By leveraging the unique advantages of FeRAMs, such as ultra-low switching energy, in combination with the non-disruptive (infinite) reading capability of RRAMs, this circuit enables efficient on-chip inference and learning at the Edge.
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Dates and versions

cea-04539478 , version 1 (09-04-2024)

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Michele Martemucci, François Rummens, Tifenn Hirtzlin, Simon Martin, Olivier Guille, et al.. Hybrid FeRAM/RRAM synapse circuit for on-chip inference and learning at the edge. IEDM 2023 - 69th Annual IEEE International Electron Devices Meeting, Dec 2023, San Francisco, United States. ⟨10.1109/IEDM45741.2023.10413857⟩. ⟨cea-04539478⟩
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