Mechanical stress in damascene copper/low-k interconnects has been studied by means of micro-rotating sensors embedded in chips and directly integrated in CMOS process flow. A new hinge sensor design has been elaborated and a new analytical model of the mechanical equilibrium of sensors is validated. These sensors allow the study of the average residual stress as a function of the line width in a range from few hundred nanometers to several microns. It was found that the residual stress increases from 290 to 850 MPa in, respectively, 2 and 0.25 μm wide lines. This trend shows a yield stress increase with the line width reduction. Copper grains microstructure change between large and narrow lines is probably one of the reasons for yield stress and so residual stress increase. This microstructure change has been observed by means of Transmission Electron Microscopy (TEM) observations.