Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

Assia Tria; Nicolas Rodriguez; Anne-Lise Ribotta; Gerald Haller; V. Goubier; B. Garcia

Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

Assia Tria ¹ Nicolas Rodriguez ¹ Anne-Lise Ribotta ¹ Gerald Haller V. Goubier ² B. Garcia

1 ERC CEA / EMSE - Équipe de Recherche Commune CEA - EMSE (SESAM : Secured Embedded Systems And Microelectronics)

2 ST-ROUSSET - STMicroelectronics [Rousset]

Keywords : backside preparation etching laser attack security

Type de document :

Communication dans un congrès

Micopackaging days 2009, Oct 2009, Gardanne, France

Domaine :

Informatique [cs] / Cryptographie et sécurité [cs.CR]

Liste complète des métadonnées

https://hal-emse.ccsd.cnrs.fr/emse-00463506
Contributeur : Assia Tria <>
Soumis le : vendredi 12 mars 2010 - 14:41:15
Dernière modification le : mardi 23 octobre 2018 - 14:36:05

Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

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