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Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

Assia Tria 1 Nicolas Rodriguez 1 Anne-Lise Ribotta 1 Gerald Haller V. Goubier 2 B. Garcia
1 ERC CEA / EMSE - Équipe de Recherche Commune CEA - EMSE (SESAM : Secured Embedded Systems And Microelectronics)
2 ST-ROUSSET - STMicroelectronics [Rousset]
Keywords : backside preparation etching laser attack security
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Conference papers
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https://hal-emse.ccsd.cnrs.fr/emse-00463506
Contributor : Assia Tria <>
Submitted on : Friday, March 12, 2010 - 2:41:15 PM
Last modification on : Wednesday, June 24, 2020 - 4:18:20 PM

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  • HAL Id : emse-00463506, version 1

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EMSE | CMP-ENSMSE | SAS-ENSMSE | CEA | INSTITUT-TELECOM

Citation

Assia Tria, Nicolas Rodriguez, Anne-Lise Ribotta, Gerald Haller, V. Goubier, et al.. Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged. Micopackaging days 2009, Oct 2009, Gardanne, France. ⟨emse-00463506⟩

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