Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

Assia Tria; Nicolas Rodriguez; Anne-Lise Ribotta; Gerald Haller; V. Goubier; B. Garcia

Conference Papers Year : 2009

Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

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1
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Assia Tria

Function : Author
PersonId : 867645

Équipe de Recherche Commune CEA - EMSE (SESAM : Secured Embedded Systems And Microelectronics)

Nicolas Rodriguez

Function : Author
PersonId : 8921
IdHAL : sophie-cribier
ORCID : 0000-0003-1079-6041
IdRef : 075588625

Équipe de Recherche Commune CEA - EMSE (SESAM : Secured Embedded Systems And Microelectronics)

Anne-Lise Ribotta

Function : Author
PersonId : 867938

Équipe de Recherche Commune CEA - EMSE (SESAM : Secured Embedded Systems And Microelectronics)

Gerald Haller

Function : Author
PersonId : 867951

V. Goubier

Function : Author

STMicroelectronics [Rousset]

B. Garcia

Function : Author

Keywords

backside preparation etching laser attack security

Domains

Cryptography and Security [cs.CR]

Assia Tria : Connect in order to contact the contributor

https://hal-emse.ccsd.cnrs.fr/emse-00463506

Submitted on : Friday, March 12, 2010-2:41:15 PM

Last modification on : Tuesday, August 27, 2024-12:41:20 PM

Dates and versions

emse-00463506 , version 1 (12-03-2010)

Identifiers

HAL Id : emse-00463506 , version 1

Cite

Assia Tria, Nicolas Rodriguez, Anne-Lise Ribotta, Gerald Haller, V. Goubier, et al.. Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged. Micopackaging days 2009, Oct 2009, Gardanne, France. ⟨emse-00463506⟩

Backside sample preparation Backside sample preparation for integrated circuit packaged for integrated circuit packaged

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