Cache Based Power Analysis Attacks on AES

Abstract : This paper describes possible attacks against software implementations of AES running on processors with cache mechanisms, particularly in the case of smart cards. These attacks are based on sidechannel information gained by observing cache hits and misses in the current drawn by the smart card. Two dierent attacks are described. The first is a combination of ideas proposed in [2] and [11] to produce an attack that only requires the manipulation of the plain text and the observation of the current. The second is an attack based on specific implementations of the xtime function [10]. These attacks are shown to also work against algorithms using Boolean data masking techniques as a DPA countermeasure.
keyword : fault attacks AES
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Communication dans un congrès
11th Australasian Conference on Information Security and Privacy (ACISP'06), Jul 2006, Melbourne, Australia. Springer, LNCS (4058), pp.17-28, 2006, Lecture Notes in Computer Science
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Contributeur : Jacques Jean-Alain Fournier <>
Soumis le : jeudi 3 juin 2010 - 16:03:51
Dernière modification le : jeudi 3 juin 2010 - 20:43:39
Document(s) archivé(s) le : jeudi 30 juin 2011 - 12:55:22

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  • HAL Id : emse-00489012, version 1

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Jacques Jean-Alain Fournier, Michael Tunstall. Cache Based Power Analysis Attacks on AES. 11th Australasian Conference on Information Security and Privacy (ACISP'06), Jul 2006, Melbourne, Australia. Springer, LNCS (4058), pp.17-28, 2006, Lecture Notes in Computer Science. 〈emse-00489012〉

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