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Material Emulation of Faults on Cryptoprocessors

Abstract : This paper describes a block that can be added to a crypto-processor embedded on a FPGA. This block enables to simulate the co- processor behaviour when faults are injected. Three fault models are used and an example with AES is given. The aim of such a block is to speed up the test of countermeasures on a FPGA before running the chip in fab.
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https://hal-emse.ccsd.cnrs.fr/emse-00494246
Contributor : Jean-Baptiste Rigaud <>
Submitted on : Tuesday, June 22, 2010 - 2:59:29 PM
Last modification on : Wednesday, June 24, 2020 - 4:18:32 PM
Document(s) archivé(s) le : Friday, September 24, 2010 - 5:47:12 PM

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  • HAL Id : emse-00494246, version 1

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Julien Francq, Pascal Manet, Jean-Baptiste Rigaud. Material Emulation of Faults on Cryptoprocessors. SAME'06, Oct 2006, Nice, France. pp.ISBN 2-9524014-1-1. ⟨emse-00494246⟩

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