Robustness of circuits under delay-induced faults : test of AES with the PAFI tool

Abstract : Security of cryptographic circuits is a major concern. Fault attacks are a mean to obtain critical information with the use of physical disturbance and cryptanalysis. We propose a methodology and a tool to analyse the robustness of circuit under faults induced by a delay. We tested a circuit implementing AES and showed that delay faults can permit to perform known fault attacks.
Type de document :
Communication dans un congrès
IEEE. 13th IEEE International On-Line Testing Symposium IOLTS 2007, Jul 2008, Heraklion, France. IEEE, pp.185-186, 2008, B. 〈10.1109/IOLTS.2007.57〉
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https://hal-emse.ccsd.cnrs.fr/emse-00504707
Contributeur : Laurent Freund <>
Soumis le : mercredi 21 juillet 2010 - 10:57:56
Dernière modification le : jeudi 30 novembre 2017 - 01:14:52

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Olivier Faurax, Laurent Freund, Assia Tria, Traian Muntean, Frédéric Bancel. Robustness of circuits under delay-induced faults : test of AES with the PAFI tool. IEEE. 13th IEEE International On-Line Testing Symposium IOLTS 2007, Jul 2008, Heraklion, France. IEEE, pp.185-186, 2008, B. 〈10.1109/IOLTS.2007.57〉. 〈emse-00504707〉

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