The production of Integrated Circuits (ICs) is subject to high quality standards, and many control steps are incorporated in manufacturing processes. In the same perspective, Statistical Process Control (SPC) methods are intensively used as decision tools for the sake of quality monitoring. However, these conventional SPC methods don't include spatial correlation in their analysis, which can limit their detection power. To deal with this problem, we consider a two steps monitoring scheme. Zernike regression is used to model wafers profile and Hotelling's T2 chart is employed to make a decision. After showing the links between the approach and some key process parameters, we investigate further improvements for wafers profile modelling. It can be improved by a Gaussian Process regression or Kriging, especially when a correct correlation function or kernel is specified. Two kinds of kernels found in the literature are compared: traditional constructions according to the Cartesian coordinates, and a more recent class of kernels defined in the polar system. As a result, the accuracy of the model can be enhanced with a priori knowledge on the kernel, therefore on the process.