ElectroMagnetic Analysis and Fault Injection onto Secure Circuits

Paolo Maistri 1 Regis Leveugle 1 Lilian Bossuet 2 Alain Aubert 2 Viktor Fischer 2 Bruno Robisson 3 Nicolas Moro 3 Philippe Maurine 4, 3 Jean-Max Dutertre 3 Mathieu Lisart 5
1 TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture
2 LHC - Laboratoire Hubert Curien [Saint Etienne]
3 SAS-ENSMSE - Département Systèmes et Architectures Sécurisés
4 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
5 ST-TOURS - STMicroelectronics [Tours]
Abstract : Implementation attacks are a major threat to hardware cryptographic implementations. These attacks exploit the correlation existing between the computed data and variables such as computation time, consumed power, and electromagnetic (EM) emissions. Recently, the EM channel has been proven as an effective passive and active attack technique against secure implementations. In this paper, we review the recent results obtained on this subject, with a particular focus on EM as a fault injection tool.
Keywords : EM injection Fault Attack Fault Injection
Type de document :
Communication dans un congrès
VLSI-SoC: Very Large Scale Integration - System-on-Chip, Oct 2014, Mexico, Mexico. 22nd International Conference on Very Large Scale Integration, 2014, 〈10.1109/VLSI-SoC.2014.7004182〉
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Contributeur : Jean-Max Dutertre <>
Soumis le : vendredi 27 novembre 2015 - 13:43:51
Dernière modification le : jeudi 24 mai 2018 - 15:59:25
Document(s) archivé(s) le : samedi 29 avril 2017 - 01:42:44

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UNIV-ST-ETIENNE | EMSE | TIMA | UGA | SAS-ENSMSE | LIRMM | SYSMIC | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

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Paolo Maistri, Regis Leveugle, Lilian Bossuet, Alain Aubert, Viktor Fischer, et al.. ElectroMagnetic Analysis and Fault Injection onto Secure Circuits. VLSI-SoC: Very Large Scale Integration - System-on-Chip, Oct 2014, Mexico, Mexico. 22nd International Conference on Very Large Scale Integration, 2014, 〈10.1109/VLSI-SoC.2014.7004182〉. 〈emse-01099025〉

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